In a conventional type of radio receiver based on a frequency synthesizer system such as, for instance, an FM receiver, when selecting a station electronically, the operation for selecting a station is carried out by searching channels one by one.
Herein, terms used in the following description are defined as follows. Assuming that programmed frequencies have been allocated to a plurality of channels, "scan" is defined as sequentially scanning a specified channel in the order of channels, while "search" is defined as continuously scanning a specified frequency range (with specified upper and lower limits) at a specified frequency space (channel step).
FIG. 5 is a block diagram of a first conventional type of FM radio receiver. In this figure, the first conventional type of radio receiver comprises an antenna 101, a radio receiver 102, a frequency discriminator 103, a squelch circuit 104, a low frequency amplifier 105, a speaker 106, a window detector 507, a frequency synthesizer 109, a CPU (central processing unit) 510, and a keyboard 111.
A description is made for a search operation in the normal state of an FM radio receiver having the configuration as described above with reference to the flow chart shown in FIG. 6. It should be noted that the figure shows a processing sequence of the CPU 510 controlling the normal search operation.
At first, in Step S601, the CPU 510 starts operation of a squelch signal detection timer to detect a squelch signal SC (indicating existence of a received signal) from the squelch circuit 104, and makes a determination as to whether the squelch signal has been detected in Step S602.
If the squelch signal SC is not detected in Step S602 and the squelch signal detection timer has not timed out in Step S603, control again returns to Step S602, and the operation for detecting the squelch signal SC is continued. If the squelch signal detection timer has timed out, PLL data PD for the next channel is transmitted to the frequency synthesizer 109 in Step S605.
If the squelch signal SC is detected in Step S602, determination as to whether a window signal WD from the window detector 507 has been detected is executed in Step S604. Herein the window signal WD is a signal indicating existence of a received signal in a specified bandwidth (window) based on an output voltage Vd from the frequency discriminator 103.
If the window signal WD is detected in Step S604, it is determined that a desired frequency was searched and the processing is terminated. If the window signal WD is not detected, PLL data PD for the next channel is sent to the frequency synthesizer 109 in Step S605.
For instance, as shown in FIG. 7, if it is assumed that the channel step is 12.5 KHz and a desired signal frequency is at a position of an arrow shown by a bold solid line in the figure, processing from Step S601 to S605 is repeatedly executed for search S701 to S705 with the processing from S601 to S604 executed in search S706, so that a desired signal frequency can be searched.
As described above, to execute normal search in this conventional type of FM radio receiver, it is necessary to execute scanning sequentially, channel by channel, which makes it impossible to execute search at a high speed.
FIG. 8 is a block diagram illustrating a second conventional type of FM radio receiver. In this conventional type of FM radio receiver, turbo search operation enabling search operation at a higher speed can be executed so that the problems in the first conventional type of radio receivers as described above are evaded.
The second conventional type of FM receiver, shown in FIG. 8, employs an A/D convertor 108 as the window detector 507 in the first conventional type of receiver described above and also employs a CPU 810 as the CPU 510.
Next, a description is made for the turbo search operation in the second conventional type of FM radio receiver as described above with the flow chart in FIG. 9. It should be noted that the figure shows a processing sequence by the CPU 810 controlling the turbo search operation.
In Step S901, the CPU 810 actuates a squelch signal detection timer to detect a squelch signal SC from the squelch circuit 104, and in Step S902 determination is made as to whether the squelch signal has been detected.
If the squelch signal SC is not detected in Step S902 and the squelch signal detection timer has not timed out in Step S903, control again returns to Step S902 to detect the squelch signal SC. If the squelch signal detection timer has timed out, the PLL data PD with data for three channels added thereto is sent to the frequency synthesizer 109 in Step S904.
If the squelch signal SC is detected in Step S902, determination as to whether output from the A/D convertor 108, namely output voltage Vd from the frequency discriminator 103 is in a range between an upper threshold voltage V2 and a lower threshold voltage V1, is executed in Step S905.
The upper threshold voltage V2 and the lower threshold voltage V1 are set as indicated by the characteristics of the frequency discriminator 103 shown in FIG. 4. Namely, assuming that output voltage from the frequency discriminator 103 corresponding to a received frequency F0 is V0, the upper threshold voltage V2 corresponds to a frequency between F0 and F0+ (1 channel step), while the lower threshold voltage V1 corresponds to a frequency between F0- (1 channel step) and F0.
In Step S905, if the output voltage Vd from the frequency discriminator 103 is not in a range between the upper threshold voltage V2 and the lower threshold voltage V1, determination is made as to whether the output voltage Vd is less than the lower threshold voltage V1 in Step S906. In Step S905, if the output voltage Vd from the frequency discriminator 103 is in a range between the upper threshold voltage V2 and lower threshold voltage V1, it is determined that a desired frequency has been searched, and the processing is terminated.
In Step 906, if the output voltage Vd is less than the lower threshold voltage V1, data for 1 channel step is subtracted from the current PLL data in Step S907, and the PLL data PD after subtraction is sent to the frequency synthesizer 109 in Step S909. Also in Step S906, if the output voltage Vd is not less than the lower threshold voltage V1, data for 1 channel step is added to the current PLL data in Step S908, and the PLL data after addition is sent to the frequency synthesizer 109 in Step S909.
For instance, as shown by the explanatory drawing for a turbo search operation in FIG. 10, if it is assumed that the channel step is 5 KHz and a desired signal frequency is at a position of the arrow expressed with a bold solid line in the figure, processes from Step S901 to S S904 above and that in S909 are executed repeatedly for search S1001 to S1002, operations in Steps S901, S902, S905, S906, S907, and S909 are executed for search S1003. Furthermore, operations in Step S901, S902, and S905 are executed in search S1004, and thus a desired signal frequency is searched. It should be noted that the trapezoidal section shown at the center of FIG. 10 indicates a bandwidth to be searched (a window including 3 channels), and a bandwidth when a desired signal frequency is specified is a trapezoidal range shown with a bold solid line in the figure.
As described above, in the second conventional type of radio receiver, a search is usually executed once for every 3 channels, and when a signal is detected, a search is executed for each channel, so that a search operation can be executed at a higher speed as compared to the first conventional type of radio receiver.
Then, a portion of the wave detection characteristics by the frequency discriminator 103 according to the first and second conventional type of radio receiver is shown in FIG. 11.
However, the conventional types of radio receiver as described above are generally constructed so that signal can be received in a plurality of bands (such as, for instance, VHF or UHF).
In the first conventional type of radio receiver, scanning is executed with a 5 KHz channel step for a VHF band, while scanning is executed with a 12.5 KHz channel step for a UHF band, but it is required to execute scanning sequentially, channel by channel, which makes it impossible to execute search at a high speed.
In the second conventional type of radio receiver, when a turbo search operation is executed for a VHF band, a search is executed once for every specified bandwidth (a window including 3 channels), and when a signal is detected, a search is executed channel by channel (1 channel step=5 KHz), so that a search operation can be executed at a 3 times higher speed than that in the first conventional type of radio receiver. As the channel step for the UHF band is 12.5 KHz, however, usually only 1 channel is included in the specified bandwidth (window), and even if a turbo search operation is executed according to the same sequence, it is impossible to obtain substantially the same effect.
In the VHF band where scanning is executed with a 5 KHz channel step, it never occurs that a channel is registered in an adjoining frequency, but in the UHF band where scanning is executed with a 12.5 KHz channel, the possibility for a channel to be registered in an adjoining frequency is high, and if such a state occurs, a plurality of signals exist in a bandwidth (window). Even if a turbo search operation is executed according to the same sequence, it is difficult to identify a frequency.
Furthermore, when a specified bandwidth (window) is extended to execute a turbo search operation for the UHF band according to the same sequence as that for a turbo search operation for the VHF band, it is necessary to provide frequency filter circuits in the radio receiving section 102 individually and also it is necessary to prepare detection circuits in the frequency discriminator 103 each corresponding to the bandwidth respectively individually. The impossibility of sharing these circuits disadvantageously results in an increase of hardware.